Ady Alhamdan
Resume

Hi, I’m Ady. 3rd-year Computer Engineering @ UWaterloo.

I focus on embedded software and computer vision. Outside of work I bike, play soccer, and play music!

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Ady Alhamdan

Experience

Firmware Engineering Intern · onsemi

May–Aug 2025

Company
  • Integrated Zephyr RTOS with an IP driver platform (UART, PWM, I²C, GPIO, GPT, DMA) by implementing adaptation layers for deterministic HW/SW communication.
  • Wrote unit tests using Zephyr’s ztest to validate driver bring‑up and prevent regressions in a real‑time environment.
  • Designed a sensorless trapezoidal BLDC motor controller in Zephyr using six PWM channels; tuned timing and commutation for stable startup and speed control.
  • Validated bring‑up on FPGA and STM32 targets with I²C test harnesses and logic‑analyzer traces; refined interrupt vs blocking APIs to improve robustness and concurrency.
C Zephyr RTOS DeviceTree Kconfig PWM I²C UART DMA STM32 FPGA Logic Analyzer

AI Software Engineering Intern · Martinrea International Inc.

Sep–Dec 2024

Company
  • Built a real‑time CV system on Linux for detection, tracking, and collision prediction in high‑throughput settings.
  • Implemented speed estimation, Kalman‑based trajectory prediction, and homography + fisheye calibration, improving localization accuracy by 40%.
  • Engineered a multiprocessing/multithreading pipeline with semaphores & shared memory ensuring zero frame drops; reduced inference latency 13 ms → 3 ms via CUDA, TensorRT, PyTorch, and DLA.
  • Automated synthetic dataset generation in Unity for key‑point models, reducing manual labelling by ~70%.
Python OpenCV YOLOv8 CUDA TensorRT PyTorch Linux Jetson Orin Unity

Electrical Engineering Intern · Martinrea International Inc.

Jan–Apr 2024 · Tillsonburg, ON

Company
  • Integrated a Raspberry Pi + relay interface for PLC ↔ external systems, boosting production by 3.3% Jobs/hour.
  • Implemented a robot‑hold sequence with safety interlocks in PLC ladder logic, increasing throughput by 1.67% Jobs/hour.
  • Built an HMI tracking system (Ladder Logic, Ignition Python, SQL, Vision screens) for comprehensive maintenance traceability.
  • Prototyped a Python linear‑programming optimizer for truck capacity, saving ~$20k/yr.
PLC Ladder Logic Ignition SQL Python Raspberry Pi Safety Interlocks

Application Developer (Co‑op) · Ontario Ministry of Public & Business Service Delivery

May–Dec 2022; May–Aug 2023 · Toronto, ON

Ministry
  • Rebuilt a tracking portal with React + Node/Express + MongoDB to replace manual status workflows.
  • Automated invoice reconciliation with PowerApps (+ AI) & Power Automate, streamlining approvals.
  • Automated edits across 6,000+ PDFs using Power Automate Desktop, cutting manual effort by ~70%.
  • Modeled Dataverse schemas for onboarding interviews and scoring.
React Node Express MongoDB PowerApps Power Automate Dataverse

Electrical Subteam Member · UW Orbital Design Team

Sep 2023 – Dec 2023

Team
  • Researched ground‑station RF hardware (circulators, cavity filters, antennas, lightning protection) and cabling.
  • Drafted schematics for a CC1120‑based transceiver (SPI, power, RF front‑end) and designed BMS with MAX17320.
  • Validated boards using DMM, oscilloscope, and network analyzer (s‑parameters).
RF CC1120 SPI BMS MAX17320 Network Analyzer

Selected Projects

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LLM Accelerator — SystemVerilog RTL

Hardware

Integrated a self‑attention head with matrix multiply, GELU, and LayerNorm to build a BERT‑style accelerator; implemented MAC, GELU, accumulate units and a 2D systolic array for high‑throughput inference; added fixed‑point softmax and buffering for full pipeline.

  • SystemVerilog
  • RTL
  • Systolic Array
  • FPGA

Real‑Time Executive (RTX) — C · ARM · STM32

Firmware

Built a pre‑emptive multitasking executive with context switching, RTOS primitives, and an EDF scheduler; implemented a First‑Fit allocator and task APIs for deterministic execution on resource‑constrained MCUs.

  • C
  • STM32
  • RTOS
  • EDF

FPGA Audio Player (Nios II)

Embedded

Real‑time .wav playback from microSD using FatFS on Altera FPGA; LCD UI and debounced controls; smooth stereo output without dropouts.

  • C
  • Nios II
  • FatFS

STM32 Water‑Reservoir Controller

Firmware

PWM control for DC + servo motors with UART sensor I/O (HC‑SR04); robust signal integration and feedback loops.

  • C
  • STM32
  • UART · PWM

Linux Producer–Consumer (IPC)

Systems

Multiprocess bounded‑buffer using System V shared memory & POSIX semaphores; cURL callbacks for streamed image segments; tuned buffer sizes for latency/throughput.

  • C
  • IPC

Music‑Sheet Auto Page‑Turner

Hackathon

Bluetooth‑connected app (MIT App Inventor) plus Arduino‑driven mechanics; algorithmic timing for page flips; smooth gear‑motor actuation.

  • Arduino
  • Bluetooth
GitHub

Let’s build something great

Email me or say hi on LinkedIn. I read everything.

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© Ady Alhamdan